Publications

2022

1. FPGA

   Logic Shrinkage: Learned FPGA Netlist Sparsity for Efficient Neural Network Inference

   Erwei Wang, James Davis, Georgios Stavrou, Peter Cheung, George Constantinides, Mohamed S. Abdelfattah

   International Symposium on Field-Programmable Gate Arrays

   Nominated for the best paper award.

2021

1. ICLR

   Zero-Cost Proxies for Lightweight NAS

   Mohamed S. Abdelfattah, Abhinav Mehrotra, Łukasz Dudziak, Nicholas D. Lane

   International Conference on Learning Representations
2. ICLR

   NAS-Bench-ASR: Reproducible Neural Architecture Search for Speech Recognition

   Abhinav Mehrotra, Alberto Gil C. P. Ramos, Sourav Bhattacharya, Łukasz Dudziak, Ravichander Vipperla, Thomas Chau, Mohamed S. Abdelfattah, Samin Ishtiaq, Nicholas D. Lane

   International Conference on Learning Representations
3. ICCV

   Temporal Kernel Consistency for Blind Video Super-Resolution

   Lichuan Chang, Royson Lee, Hongkai Wen, Mohamed S. Abdelfattah, Nicholas D. Lane

   International Conference on Computer Vision Workshops

2020

1. NeurIPS

   BRP-NAS: Prediction-based NAS using GCNs

   Łukasz Dudziak, Thomas Chau, Mohamed S. Abdelfattah, Royson Lee, Hyeji Kim, Nicholas D. Lane

   Conference on Neural Information Processing Systems
2. INTERSPEECH

   Iterative Compression of End-to-End ASR Model Using Reinforcement learning

   Abhinav Mehrotra, Łukasz Dudziak, Jinsu Yeo, Younyoon Lee, Ravichander Vipperla, Mohamed S. Abdelfattah, Sangjeong Lee, Daehyun Kim, Nicholas D. Lane

   Conference of the International Speech Communication Association
3. ECCV

   Journey Towards Tiny Perceptual Super-Resolution

   Royson Lee, Łukasz Dudziak, Mohamed S. Abdelfattah, Hyeji Kim, Stylianos Veneris, Hongkai Wen, Nicholas D. Lane

   European Conference on Computer Vision
4. DAC

   Best of Both Worlds: AutoML Codesign of a CNN and its Hardware Accelerator

   Mohamed S. Abdelfattah, Łukasz Dudziak, Thomas Chau, Royson Lee, Hyeji Kim, Nicholas D. Lane

   Design Automation Conference

2019

1. INTERSPEECH

   ShrinkML: End-to-End ASR Model Compression Using Reinforcement Learning

   Łukasz Dudziak, Mohamed S. Abdelfattah, Ravichander Vipperla, Stefanos Laskaridis, Nicholas D. Lane

   Conference of the International Speech Communication Association

2018

1. FPL

   DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration

   Mohamed S. Abdelfattah, David Han, Andrew Bitar, Roberto DiCecco, Shane O’Connell, Nitika Shanker, Joseph Chu, Ian Prins, Joshua Fender, Andrew C. Ling, Gordon R. Chiu

   International Conference on Field-Programmable Logic and Applications
2. HEART

   Harnessing Numerical Flexibility for Deep Learning on FPGAs

   Andrew C. Ling, Mohamed S. Abdelfattah, Shane O’Connell, Andrew Bitar, David Han, Roberto Dicecco, Suchit Subhaschandra, Chris N Johnson, Dmitry Denisenko, Josh Fender, Gordon R. Chiu

   International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies
3. ISPD

   Flexibility: FPGAs and CAD in Deep Learning Acceleration

   Gordon R. Chiu, Andrew C. Ling, Davor Capalija, Andrew Bitar, Mohamed S. Abdelfattah

   International Symposium on Physical Design

2016

1. TCOMP

   Design and applications for embedded networks-on-chip on FPGAs

   Mohamed S. Abdelfattah, Andrew Bitar, Vaughn Betz

   IEEE Transactions on Computers
2. FPL

   LYNX: CAD for FPGA-based networks-on-chip

   Mohamed S. Abdelfattah, Vaughn Betz

   International Conference on Field-Programmable Logic and Applications

   Nominated for the Michel Servit best paper award.

2015

1. FPT

   Bringing programmability to the data plane: Packet processing with a NoC-enhanced FPGA

   Andrew Bitar, Mohamed S. Abdelfattah, Vaughn Betz

   International Conference on Field-Programmable Technology
2. FPL

   Design and simulation tools for Embedded NOCs on FPGAs

   Mohamed S. Abdelfattah, Andrew Bitar, Ange Yaghi, Vaughn Betz

   International Conference on Field-Programmable Logic and Applications
3. FPGA

   Take the highway: Design for embedded NoCs on FPGAs

   Mohamed S. Abdelfattah, Andrew Bitar, Vaughn Betz

   International Symposium on Field-Programmable Gate Arrays

   Best Paper Award
4. TVLSI

   Power analysis of embedded NoCs on FPGAs and comparison with custom buses

   Mohamed S. Abdelfattah, Vaughn Betz

   IEEE Transactions on Very Large-Scale Integration Systems

2014

1. TRETS

   Networks-on-Chip for FPGAs: Hard, Soft or Mixed?

   Mohamed S. Abdelfattah, Vaughn Betz

   ACM Transactions on Reconfigurable Technology and Systems
2. IWOCL

   Gzip on a chip: High performance lossless data compression on fpgas using opencl

   Mohamed S. Abdelfattah, Andrei Hagiescu, Deshanand Singh

   International Workshop on OpenCL
3. MICRO

   The Case for Embedded Networks-on-Chip on FPGAs

   Mohamed S. Abdelfattah, Vaughn Betz

   IEEE Micro Magazine

2013

1. CARL

   Augmenting FPGAs with Embedded Networks on Chip

   Mohamed S. Abdelfattah, Vaughn Betz

   Workshop on the Intersection of Computer Architecture and Reconfigurable Logic
2. FPL

   The Power of Communication: Energy-Efficient NoCs for FPGAs

   Mohamed S. Abdelfattah, Vaughn Betz

   International Conference on Field-Programmable Logic and Applications

   Stamatis Vassiliadis best paper award.
   Selected as one of the most significant papers from the first 25 years of FPL.

2012

1. FPT

   Design tradeoffs for hard and soft FPGA-based Networks-on-Chip

   Mohamed S. Abdelfattah, Vaughn Betz

   International Conference on Field-Programmable Technology
2. IOLTS

   Transparent Structural Online Test for Reconfigurable Systems

   Mohamed S. Abdelfattah, Lars Bauer, Claus Braun, Michael E Imhof, Michael A Kochte, Hongyan Zhang, Jörg Henkel, Hans-Joachim Wunderlich

   International Symposium on On-Line Testing and Robust System Design

2011

1. GeMiC

   2.2 GHz LC VCO for RFID on a 0.5-μm digital gate-array designed for ultra-thin silicon substrates

   Mohamed S. Abdelfattah, Damir Ferenci, Markus Grözing, Manfred Berroth, Cor Scherjon, Joachim Burghartz

   German Microwave Conference

2009

1. ProRISC

   Design of a RF Transmitter for RFID Tags in a New Technology with Ultra Thin Silicon Substrates

   Mohamed S. Abdelfattah, Damir Ferenci, Markus Grözing, Manfred Berroth, Cor Scherjon, Joachim N Burghartz

   Workshop on Circuit Design and Digital Signal Processing